Test Development Engineer - (Fresh graduate )

The Test Development group is responsible for developing test solutions (software+hardware) for Altera products to ensure that devices shipped to our customers are free from defect.

Responsibilities:
• As a Test Development Apprentice, you will focus primarily on ATE program development, silicon debug, and rollout of test solutions for volume production of one of Altera’s latest FPGA products.
• Apprentices will also have the opportunity for hands-on exposure to full chip & IP test methods and test design development.
• You will work closely with cross functional groups in the U.S. and Malaysia as you drive for test capability throughout the entire product development cycle.
• As part of a highly technical team, you will have the opportunity to be exposed to industry leading test methodology, as well as new test development processes.

Requirements:
• We are seeking candidates who are avid programmers, have interest in understanding software-to-hardware interaction, keen on engineering lab work, and enjoy exposure to a variety of engineering functions.
• Candidate must possess at least a BS/MS in Electrical Engineering or equivalent. Recent colleague graduate with CGPA > 3.2 are encouraged to apply.
• Solid understanding of digital and analog circuits. Academic exposure to IC Test Development, with its associated test methods and fault models, is an advantage.
• Applicants should be Malaysian citizens or hold relevant residence status.

Analog IP Design Engineer – (Fresh graduate)

As an Analog Design Engineer, you will be responsible for the design and validation of analog IP timing and functionality in Very-Deep-Sub-Micron (VDSM) technology nodes. The analog IPs include High Speed Transmitter & Receiver, Ring Oscillator/LC based PLL, High-Speed IO Buffers, Clock-Data Recovery unit, Phase Interpolator, ESD devices and etc. You will need to review layout to produce quality and reliable layout. You will debug, verify and correlate circuit behavior between simulation and silicon to ensure product specifications are met.

Qualifications include:
3) Must have VLSI and microelectronics background
4) Must have programming and scripting capability
5) Nice to have PLL and high-speed SERDES fundamental
6) Bachelors or post-graduate degree in EE, CE or CS, or equivalent, with a minimum of 3 years of relevant experience. Recent colleague graduate with CGPA > 3.2 are encourage to apply

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Software Engineer, (Device Modeling)

The Altera Quartus II design software provides a complete, multiplatform
design environment that easily adapts to your specific design needs. It is a
comprehensive environment for system-on-a-programmable-chip (SOPC)
design. The Quartus II software includes solutions for all phases of FPGA
and CPLD design

Your responsibilities will include but not be limited to:

    • Develop analytical and simulation engines that accurately model I/O, timing and power characteristics in Altera devices
    • Develop designs and verification patterns for I/O, power and timing analyses
    • Develop tools to accurately model I/O switching noise
    • Develop systems to automate validation of these models using industry standard tools, scripts and equipment
    • Pre and post-silicon timing correlation to maintain high quality timing models

Requirements:

    • Bachelors, Masters or PhD in Computer Science, Computer Engineering or Electronic Engineering equivalent
    • Familiar C/C++, Verilog/VHDL and scripting (Tcl/Perl)
    • Knowledge in silicon correlation activities would be a plus
    • Knowledge of transistor models (e.g. the effects of voltage, temperature and process variation) would be an added advantage
    • Knowledge of SPICE or any circuit simulators would be an added advantage
    • Good in communication, resourcefulness, initiative, innovation and teamwork
    • Highly motivated to learn and adapt to fast-changing technologies and environments
    • Self driven and require minimal supervision in driving projects

Design Automation Engineers

Responsibilities:

    • Lead, define and develop custom design flow and methodologies.
    • Source state of the art Electronics Design Automation (EDA) tools and develop in-house automation solutions to support IC Design and Mask Design teams.
    • Incorporate Foundry PDK, customize Altera internal requirements and deploy production ready PDK for flag ship and proliferation products.
    • Liaise with Foundry, EDA vendors, design and technology partners to evaluate and implement engineering solutions.